Use ${CC} and "CC ?= gcc" in Makefile
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parent
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1 changed files with 5 additions and 3 deletions
8
Makefile
8
Makefile
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@ -1,3 +1,5 @@
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CC ?= gcc
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COMMON_FLAGS = -Wall -Wextra -Wpedantic \
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-Ithird_party
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DEBUG_FLAGS = -Og -g
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@ -42,10 +44,10 @@ OBJECTS = $(addprefix ${OBJECT_DIR}/,$(patsubst %.c,%.c.o,${SOURCES}))
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all: c_simple_http unit_test
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c_simple_http: ${OBJECTS}
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gcc -o c_simple_http ${CFLAGS} $^
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${CC} -o c_simple_http ${CFLAGS} $^
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unit_test: $(filter-out ${OBJECT_DIR}/src/main.c.o,${OBJECTS}) ${OBJECT_DIR}/src/test.c.o
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gcc -o unit_test ${CFLAGS} $^
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${CC} -o unit_test ${CFLAGS} $^
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.PHONY: clean
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@ -56,4 +58,4 @@ clean:
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${OBJECT_DIR}/%.c.o: %.c ${HEADERS}
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@mkdir -p $(dir $@)
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gcc -o $@ -c ${CFLAGS} $<
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${CC} -o $@ -c ${CFLAGS} $<
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