Use ${CC} and "CC ?= gcc" in Makefile
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This commit is contained in:
Stephen Seo 2024-09-05 16:25:49 +09:00
parent dd5934351e
commit 3f70c52551

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@ -1,3 +1,5 @@
CC ?= gcc
COMMON_FLAGS = -Wall -Wextra -Wpedantic \
-Ithird_party
DEBUG_FLAGS = -Og -g
@ -42,10 +44,10 @@ OBJECTS = $(addprefix ${OBJECT_DIR}/,$(patsubst %.c,%.c.o,${SOURCES}))
all: c_simple_http unit_test
c_simple_http: ${OBJECTS}
gcc -o c_simple_http ${CFLAGS} $^
${CC} -o c_simple_http ${CFLAGS} $^
unit_test: $(filter-out ${OBJECT_DIR}/src/main.c.o,${OBJECTS}) ${OBJECT_DIR}/src/test.c.o
gcc -o unit_test ${CFLAGS} $^
${CC} -o unit_test ${CFLAGS} $^
.PHONY: clean
@ -56,4 +58,4 @@ clean:
${OBJECT_DIR}/%.c.o: %.c ${HEADERS}
@mkdir -p $(dir $@)
gcc -o $@ -c ${CFLAGS} $<
${CC} -o $@ -c ${CFLAGS} $<